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| TC7652 Low Noise, Chopper Stabilized Operational Amplifier Features * * * * * * * * Low Offset Over Temperature Range: 10V Ultra Low Long Term Drift: 150nV/Month Low Temperature Drift: 100nV/C Low DC Input Bias Current: 15pA High Gain, CMRR and PSRR: 110dB Min Low Input Noise Voltage: 0.2Vp-p (DC to 1Hz) Internally Compensated for Unity Gain Operation Clamp Circuit for Fast Overload Recovery General Description The TC7652 is a lower noise version of the TC7650, sacrificing some input specifications (bias current and bandwidth) to achieve a 10x reduction in noise. All the other benefits of the chopper technique are present, (i.e, freedom from offset adjust, drift and reliability problems from external trim components). Like the TC7650, the TC7652 requires only two noncritical external caps for storing the chopped null potentials. There are no significant chopping spikes, internal effects or overrange lockup problems. Applications * * * * * Instrumentation Medical Instrumentation Embedded Control Temperature Sensor Amplifier Strain Gage Amplifier Device Selection Table Part Number TC7652CPA TC7652CPD Package 8-Pin Plastic DIP 14-Pin Plastic DIP Temperature Range 0C to +70C 0C to +70C Package Type 8-Pin DIP CA 1 8 CB 7 -Input 2 +Input 3 VSS 4 TC7652CPA VDD 6 Output 5 Output Clamp 14-Pin DIP CB 1 CA 2 NC 3 -Input 4 +Input 5 NC 6 VSS 7 14 INT/EXT EXT CLK 13 In 12 INT CLK Out 11 VDD 10 Output 9 8 Output Clamp CRETN TC7652CPD NC = No Internal Connection (May Be Used As Input Guard) 2002 Microchip Technology Inc. DS21464B-page 1 (c) TC7652 Functional Block Diagram TC7652 14-Pin DIP Only Output Clamp (Not On "Z" Pinout) Output Clamp Circuit Oscillator INT/EXT EXT CLK IN CLK OUT Main Amplifier Inputs NULL A B Output CB Intermod Comparator B B NULL Amplifier A NULL NOTE 1: For 8-pin DIP connect to VSS, or to CRET on "Z" pinout. CRETN (1) VSS B A CA (c) DS21464B-page 2 2002 Microchip Technology Inc. TC7652 1.0 ELECTRICAL CHARACTERISTICS *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods my affect device reliability. ABSOLUTE MAXIMUM RATINGS* Total Supply Voltage (V DD to VSS) .......................+18V Input Voltage .................... (VDD +0.3V) to (VSS - 0.3V) Voltage on Oscillator Control Pins...............VDD to VSS Duration of Output Short Circuit ..................... Indefinite Current Into Any Pin............................................ 10mA While Operating (Note 1)............................ 100A Package Power Dissipation (TA < 70C) 8-Pin Plastic DIP ....................................... 730mW 14-Pin Plastic DIP ..................................... 800mW Storage Temperature Range .............. -65C to +150C Operating Temperature Range C Device .......................................... 0C to +70C I Device ......................................... -25C to +85C TC7652 ELECTRICAL SPECIFICATIONS Electrical Characteristics: VDD = +5V, VSS = -5V, TA = +25C, unless otherwise indicated. Symbol VOS TCV OS VOS/DT IBIAS Parameter Input Offset Voltage Average Temperature Co-efficient of Input Offset Voltage Offset Voltage vs Time Input Bias Current (CLK On) Min -- -- -- -- -- -- -- -- -- -- -- 120 4.7 -- -4.3 120 120 -- -- -- -- -- -- 5 Typ 2 0.01 150 30 100 250 15 35 100 25 1012 150 4.85 4.95 -- 140 140 0.2 0.7 0.01 0.4 1 15 -- Max 5 0.05 -- 100 -- 1000 30 -- 1000 150 -- -- -- -- +3.5 -- -- 1.5 5 -- -- -- -- 16 Units V V/C nV/mo pA TA = +25C 0C < TA < +70C -25C < TA < +85C TA = +25C 0C < TA < +70C -25C < TA < +85C Test Conditions TA = +25C 0C < TA < +70C IBIAS Input Bias Current (CLK Off) pA IOS RIN OL VOUT CMVR MRR PSRR eN IN GBW SR VDD , VSS Input Offset Current Input Resistance Large Signal Voltage Gain Output Voltage Swing (Note 2) Common Mode Voltage Range Common Mode Rejection Ratio Power Supply Input Noise Voltage Input Noise Current Unity Gain Bandwidth Slew Rate Overshoot Operating Supply Range pA dB V V dB dB VP-P VP-P pA/ Hz MHz V/sec CL = 50pF, RL = 10k % V CMVR = -4.3V to +3.5V 3V to 8V RS = 100, DC to 1Hz DC to 10Hz f = 10Hz RL = 10k, VOUT = 4V RL = 10k RL = 100k Note 1: Limiting input current to 100A is recommended to avoid latch-up problems. Typically 1mA is safe however, this is not guaranteed. 2: Output clamp not connected. See typical characteristics curves for output swing versus clamp current characteristics. 3: See "Output Clamp" under detailed description. 2002 Microchip Technology Inc. DS21464B-page 3 (c) TC7652 TC7652 ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: VDD = +5V, VSS = -5V, TA = +25C, unless otherwise indicated. Symbol IS fCH Parameter Supply Current Internal Chopping Frequency Clamp ON Current (Note 3) Clamp OFF Current (Note 3) Min -- 100 25 -- Typ 1 275 100 1 Max 3 -- -- -- Units mA Hz A pA Test Conditions No Load Pins 12 - 14 Open (DIP) RL = 100k -4V VOUT < +10V Note 1: Limiting input current to 100A is recommended to avoid latch-up problems. Typically 1mA is safe however, this is not guaranteed. 2: Output clamp not connected. See typical characteristics curves for output swing versus clamp current characteristics. 3: See "Output Clamp" under detailed description. (c) DS21464B-page 4 2002 Microchip Technology Inc. TC7652 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Symbol Description Nulling capacitor pins Inverting Input Non-inverting Input Negative Power Supply Output Voltage Clamp Output Positive Power Supply No internal connection Capacitor current return pin Internal Clock Output External Clock Input Select Internal or External Clock Pin Number 8-pin DIP 1,8 2 3 4 5 6 7 -- -- -- -- -- 14-pin DIP 2,1 4 5 7 9 10 11 3,6 8 12 13 14 CA, CB -INPUT +INPUT VSS OUTPUT CLAMP OUTPUT VDD NC CRETN INT CLK OUT EXT CLK IN INT/EXT 2002 Microchip Technology Inc. DS21464B-page 5 (c) TC7652 3.0 3.1 DETAILED DESCRIPTION Capacitor Connection FIGURE 3-1: TEST CIRCUIT R2 1M 3.2 Output Clamp 0.1F In chopper stabilized amplifiers, the output clamp pin reduces overload recovery time. When a connection is made to the inverting input pin (summing junction), a current path is created between that point and the output pin, just before the device output saturates. This prevents uncontrolled differential input voltages and charge build-up on correction storage capacitors. Output swing is reduced. 3.3 Clock If the TC7652's output saturates, error voltages on the external capacitors will slow overload recovery. This condition can be avoided if a strobe signal is available. The strobe signal is applied to EXT CLK IN and the overload signal is applied to the amplifier while the strobe is LOW. In this case, neither capacitor will be charged. The low leakage of the capacitor pins allow long measurements to be made within eligible errors (typical capacitor drift is 10V/sec). The TC7652 has a 550Hz internal oscillator, which is divided by two before clocking the input chopper switches. The 275Hz chopping frequency is available at INT CLK OUT (Pin 12) on 14-pin devices. In normal operation, INT/EXT (Pin 14), which has an internal pullup, can be left open. An external clock can also be used. To disable the internal clock and use an external one, the INT/EXT pin must be tied to V SS. The external clock signal is then applied to the EXT CLK IN input (Pin 13). An internal divide-by-two provides a 50% switching duty cycle. The capacitors are only charged when EXT CLK IN is high, so a 50% to 80% positive duty cycle is recommended for higher clock frequencies. The external clock can swing between VDD and VSS, with the logic threshold about 2.5V below VDD. The output of the internal oscillator, before the divideby-two circuit, is available at EXT CLK IN when INT/ EXT is high or unconnected. This output can serve as the clock input for a second TC7652 (operating in a master/slave mode), so that both op amps will clock at the same frequency. This prevents clock intermodulation effects when two TC7652's are used in a differential amplifier configuration. 4.0 4.1 TYPICAL APPLICATIONS Component Selection C A and CB (external capacitors)should be in the 0.1F to 1F range. For minimum clock ripple noise, use a 1F capacitor in broad bandwidth circuits. For limited bandwidth applications where clock ripple is filtered out, use a 0.1F capacitor for slightly lower offset voltage. High quality, film type capacitors (polyester or polypropylene) are recommended, although a lower grade ceramic may work in some applications. For quickest settling after initial turn-on, use low dielectric absorption capacitors (e.g., polypropylene). With ceramic capacitors, settling to 1V takes several seconds. 4.2 Static Protection Although input diodes static protect all device pins, avoid strong electrostatic fields and discharges that can cause degraded diode junction characteristics and produce increased input-leakage currents. (c) DS21464B-page 6 + C R C Output 0.1F 2002 Microchip Technology Inc. Connect the null storage capacitors to the CA and C B pins with a common connection to the CRET pin (14-pin TC7652) or to VSS (8-pin TC7652). When connecting to VSS, avoid injecting load current IR drops into the capacitive circuitry by making this connection directly via a separate wire or PC trace. R1 1k TC7652 TC7652 4.3 Output Stage/Load Driving The output circuit is high impedance (about 18k). With lesser loads, the chopper amplifier behaves somewhat like a transconductance amplifier with an open-loop gain proportional to load resistance. (For example, the open-loop gain is 17dB lower with a 1k. load than with a 10k load.) If the amp is used only for DC, the DC gain is typically greater than 120dB (even with a 1k load), and this lower gain is inconsequential. For wide band, the best frequency response occurs with a load resistor of at least 10k. This produces a 6dB/octave response from 0.1Hz to 2MHz, with phase shifts of less than 2 degrees in the transition region, where the main amplifier takes over from the null amplifier. FIGURE 4-1: CONNECTION OF INPUT GUARDS Inverting Amplifier R1 Input R2 Follower TC7652 Output Input R1 Input TC7652 Output + 4.4 Thermoelectric Effects The thermoelectric (Seebeck) effects in thermocouple junctions of dissimilar metals, alloys, silicon, etc. limit ultra high precision DC amplifiers. Unless all junctions are at the same temperature, thermoelectric voltages around 0.1V/C (up to tens of V/C for some materials) are generated. To realize the low offset voltages of the chopper, avoid temperature gradients. Enclose components to eliminate air movement, especially from power dissipating elements in the system. Where possible, use low thermoelectric co-efficient connections. Keep power supply voltages and power dissipation to a minimum. Use high impedance loads and seek maximum separation from surrounding heat disipating elements. 2002 Microchip Technology Inc. + - + Noninverting Amplifier R2 TC7652 Output 4.5 Guarding To benefit from TC7652 low input currents, take care assembling printed circuit boards. Clean boards with alcohol or TCE and blow dry with compressed air. To prevent contamination, coat boards with epoxy or silicone rubber. Even if boards are cleaned and coated, leakage currents may occur because input pins are next to pins at supply potentials. To reduce this leakage, use guarding to lower the voltage difference between the inputs and adjacent metal runs. The guard (a conductive ring surrounding inputs) is connected to a low impedance point at about the same voltage as inputs. The guard absorbs leakage currents from high voltage pins. The 14-pin dual-in-line arrangement simplifies guarding. Like the LM108 pin configuration (but unlike the 101A and 741), pins next to inputs are not used. DS21464B-page 7 (c) TC7652 4.6 Pin Compatibility FIGURE 4-3: Where possible, the 8-pin device pinout conforms to such industry standards as the LM101 and LM741. Null storing external capacitors connect to Pins 1 and 8, which are usually for offset null or compensation capacitors. Output clamp (Pin 5) is similarly used. For OP05 and OP07 devices, replacement of the offset null potentiometer (connected between Pins 1 and 8 and VDD by two capacitors from those pins to VSS) provides compatibility. Replacing the compensation capacitor between Pins 1 and 8 by two capacitors to VSS is required. The same operation (with the removal of any connection to Pin 5) works for LM101, A748 and similar parts. Because NC pins provide guarding between input and other pins, the 14-pin device pinout conforms closely to the LM108. Because this device does not use any extra pins and does not provide offset nulling (but requires a compensation capacitor), some layout changes are necessary to convert to the TC7652. INVERTING AMPLIFIER WITH OPTIONAL CLAMP R2 Clamp - Output + 0.1F 0.1F R1 Input TC7652 FIGURE 4-4: USING 741 TO BOOST OUTPUT DRIVE CAPABILITY TC7652 -7.5V + In - - -7.5V 0.1 F 0.1 F -15V 10k +15V + 741 Out 4.7 Some Applications Figures 4-2 and 4-3 show basic inverting and noninverting amplifier circuits using the output clamping circuit to enhance overload recovery performance. The only limitations on replacing other op amps with the TC7652 are supply voltage (8V maximum) and output drive capability (10k load for full swing). Overcome these limitations with a booster circuit (Figure 4-4) to combine output capabilities of the LM741 (or other standard device) with input capabilities of the TC7652. These two form a composite device, therefore, when adding the feedback network, the monitor loop gains stability. FIGURE 4-2: NONINVERTING AMPLIFIER WITH OPTIONAL CLAMP 0.1F Figure 4-5 shows the clamp circuit of a zero offset comparator. Because the clamp circuit requires the inverting input to follow the input signal, problems with a chopper stabilized op amp are avoided. The threshold input must tolerate the output clamp current VIN/R without disrupting other parts of the system. Figure 4-6 shows how the TC7652 can offset null high slew rate and wideband amplifiers. Mixing the TC7652 with circuits operating at 15V requires a lower supply voltage divider with the TC7660 voltage converter circuit operated "backwards." Figure 4-7 shows an approximate connection. 0.1F Input + TC7652 Output - Clamp R3 R2 FIGURE 4-5: LOW OFFSET COMPARATOR 0.1F R1 VIN 0.1F + - Clamp TC7652 VOUT VTH 200k to 2m (c) DS21464B-page 8 2002 Microchip Technology Inc. TC7652 FIGURE 4-6: 1437 OFFSET NULLED BY TC7652 + - 22k TC7652 22k + In Out - Fast Amplifier FIGURE 4-7: SPLITTING +15V WITH THE 7660 AT >95% EFFICIENCY 2 8 3 10F 4 6 5 0V +15V +7.5V TC7660 10F 1MW 2002 Microchip Technology Inc. DS21464B-page 9 (c) TC7652 5.0 Note: TYPICAL CHARACTERISTICS The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Supply Current vs Supply Voltage -5.0 OUTPUT VOLTAGE (V) CLAMP CURRENT 1400 1200 SUPPLY CURRENT (A) Output Resistance vs Output Voltage 1 mA 0.1mA 0.01mA 1A 0.1A 0.01A 1nA 0.1nA 0.01nA -3.0 Positive Clamp Current 1000 800 600 400 200 0 2 3 4 5 6 7 SUPPLY VOLTAGE (V) 8 -4.0 SINK SOURCE 100 1k 10k 100k OUTPUT RESISTANCE (W) 1M 1pA 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 OUTPUT VOLTAGE (V) Negative Clamp Current 1mA 0.1mA Noise at 0.1Hz to 100Hz Noise at 0.1Hz to 10Hz CLAMP CURRENT 0.01mA 1A 0.1A 0.01A 1nA 0.1nA 0.01nA 1pA 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 OUTPUT VOLTAGE (V) 1 sec/DIV 1 V/DIV 1 sec/DIV Noise at 0.1Hz to 1Hz Slew Rate 60 50 40 GAIN (dB) GAIN 2 V/DIV Phase Gain (Bode Plot)* +240 +180 PHASE (deg) PHASE +120 +60 0 -60 -120 0 -10 -20 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) *NOTE: 5V, 2.5V supplies; no load to 10k load. -180 1 V/DIV 0.5V/DIV 30 20 10 1 sec/DIV 5 sec/DIV (c) DS21464B-page 10 2002 Microchip Technology Inc. TC7652 Input Offset Voltage vs Common Mode Voltage 4.0 3.5 INPUT OFFSET VOLTAGE (V) 3.0 2.5 2.0 1.5 1.0 0.5 -6 -4 -2 0 2 4 COMMON MODE VOLTAGE (V) 2002 Microchip Technology Inc. DS21464B-page 11 (c) TC7652 6.0 6.1 PACKAGING INFORMATION Package Marking Information Package marking information not available at this time. 6.2 Package Dimensions 8-Pin Plastic DIP PIN 1 .260 (6.60) .240 (6.10) .045 (1.14) .030 (0.76) .400 (10.16) .348 (8.84) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .070 (1.78) .040 (1.02) .310 (7.87) .290 (7.37) .040 (1.02) .020 (0.51) .015 (0.38) .008 (0.20) .400 (10.16) .310 (7.87) 3MIN. .110 (2.79) .090 (2.29) .022 (0.56) .015 (0.38) Dimensions: inches (mm) 14-Pin PDIP (Narrow) PIN 1 .260 (6.60) .240 (6.10) .770 (19.56) .745 (18.92) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .310 (7.87) .290 (7.37) .040 (1.02) .020 (0.51) .015 (0.38) .008 (0.20) .400 (10.16) .310 (7.87) 3MIN. .110 (2.79) .090 (2.29) .070 (1.78) .045 (1.14) .022 (0.56) .015 (0.38) Dimensions: inches (mm) (c) DS21464B-page 12 2002 Microchip Technology Inc. TC7652 SALES AND SUPPORT Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2002 Microchip Technology Inc. DS21464B-page 13 TC7652 NOTES: DS21464B-page 14 2002 Microchip Technology Inc. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro (R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified. 2002 Microchip Technology Inc. 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Unit 901-6, Tower 2, Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Italy Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 Toronto 6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509 India Microchip Technology Inc. India Liaison Office Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 03/01/02 (c) DS21464B-page 16 2002 Microchip Technology Inc. |
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